MA – Optimization of Gate Current Adjustment for Enhanced Switching Performance in SiC MOSFETs

The objective of this master’s thesis is to investigate, automate and optimize the switching performance of SiC-MOSFETs through adaptive gate current adjustment.

During the switching transient, the process is divided into distinct phases based on time intervals and their corresponding dynamic parameters. The gate current of the phase that governs the current overshoot is designated as the reference point, while the other phases should be calculated accordingly to align with this reference, with a focus on minimizing switching losses. A model should be developed based on this reference point to identify the relevant influencing factors and describe the key properties during the switching process. This model will be integrated into the software component of the test bench utilizing the BOSCH gate driver ASIC, enabling the automation of gate current adjustment calculations and timing during the switching process. Additionally, careful consideration must be given to the trade-off between turn-off losses and overvoltage. This approach should be applicable for both common gate and single gate SiC-MOSFETs configurations.

For experimental validation, the system will first be tested on a double-pulse measurement test bench at low voltage. Following further optimization, the system will then be evaluated in a high-voltage environment. The effectiveness of the implemented strategy will be thoroughly investigated through comprehensive experimental testing, and the results will be documented in detail.

Bearbeiter: Chouhdary Junaid Arshad

Betreuer: Pushkar Kulkarni, Lan Fang (BOSCH)

Verantwortlicher: Prof. Dr.-Ing. Martin März